Design of a Phase Detector with Improved Performance

Abstract

This paper presents a new type of bipolar analog Phase Detector (PD) using a high speed low voltage Emitter Coupled Logic (ECL) inverters, where positive feedback has been introduced to increase the operating range. Introduction of positive feedback has also reduced the supply voltage requirement. The same technique has been introduced in a NMOS Gilbert phase detector and similar results were obtained. The minimum supply voltage required for both these circuits were 2.1 volts.