A New Method of Realization of Four-Quadrant Analog Multiplier using Operational Amplifiers and MOSFETs

Abstract

In this article, we present a new method of realization of a four-quadrant analog multiplier using operational amplifiers (OP-AMPs) and MOSFETs. The realisation is based on the quadric nature of current of MOSFET operating in triode region.The multiplier can be derived from the proposed configuration with using either bipolar or complementary metal-oxide-semiconductor (CMOS) OP-AMPs.It can be used effectively with a wide range of supply voltages down to±1 V and can multiply over the full scale of the supply voltage if the OP-AMPs used are rail-to-rail low voltage OP-AMPs.The performancesoftheproposedmultiplier are tested through PSPICE (Cadence 16.6) simulation using TSMC 0.35 µm CMOS process parameters and arefoundto be inclose agreement with the theoretical predictions. Simulation results of the derived multiplier demonstrate a 3dB bandwidth of 9.6 MHz, a THD less than 1.21%, and anoutput referred noise less than 14nV/√Hz at 1 kΩ load condition.The maximum power consumption of the circuit is 0.75 mW. The applications of the proposed multiplier as a squarer, an amplitude modulator anda frequency doubler are also included.